63.7 F
New York
Friday, June 2, 2023

Date:

Share:

Codasip and IAR demonstrate dual-core lockstep for RISC-V

Related Articles

ISO 26262-certified tools from IAR support reference design based on the award-winning Codasip L31 core

embedded world, Nuremberg, Germany, 14 March 2023 – Codasip and IAR deliver new possibilities for low-power embedded automotive applications through the award-winning Codasip L31 core and the safety-certified version of the development toolchain IAR Embedded Workbench for RISC-V. The collaboration demonstrates a path for automotive developers to launch ISO 26262-qualified embedded applications based on the versatile Codasip L31 core.

Codasip’s dual-core lockstep reference design implements two Codasip L31 cores in a dual-core fault detection subsystem. Codasip L31 is a low-power, general-purpose, embedded RISC-V CPU providing an ideal balance between performance and power consumption. This versatile CPU brings local processing capabilities into a compact area. It can be easily customized with Codasip Studio tools for…

Read more…

Popular Articles